Internship - FPGA Acceleration & AI Model Development Summer 2026

Introduction

ASML US, including its affiliates and subsidiaries, bring together the most creative minds in science and

technology to develop lithography machines that are key to producing faster, cheaper, more energy-efficient microchips. We design, develop, integrate, market and service these advanced machines, which enable our customers - the world's leading chipmakers - to reduce the size and increase the functionality of their microchips, which in turn leads to smaller, more powerful consumer electronics. Our headquarters are in Veldhoven, Netherlands, and we have 18 office locations around the United States including main offices in Chandler, Arizona, San Jose and San Diego, California, Wilton, Connecticut, and Hillsboro, Oregon.

The intern will contribute to the development and optimization of FPGA-based acceleration solutions for AI workloads, focusing on deploying deep learning models such as ResNet and YOLO on Intel or Xilinx FPGA/SOC platforms. This role bridges hardware design and AI algorithms, enabling high-performance inference for image processing and defect detection applications.

• FPGA/SOC Development: Assist in RTL design (VHDL/Verilog), synthesis, timing analysis, and resource optimization on Intel or Xilinx platforms.

• AI Model Deployment: Port and optimize deep learning models (ResNet, YOLO) for FPGA, including quantization, pruning, and hardware mapping using toolchains like Xilinx Vitis AI or Intel OpenVINO.

• Image Processing: Support algorithm development for defect detection and object recognition; prepare datasets and train models using PyTorch/TensorFlow.

• Research and Innovation: Explore advanced topics such as low-power design, edge AI, and real-time inference; contribute to technical documentation and reports.

• Collaboration: Work closely with hardware and algorithm engineers, participate in technical discussions, and maintain clear documentation.

• Currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields.

• Coursework or project experience in FPGA design, digital logic, and machine learning.

• Prior exposure to deep learning frameworks (PyTorch/TensorFlow) and hardware acceleration is a plus.

• Technical:

  • Proficiency in VHDL/Verilog for FPGA development.

  • Familiarity with Intel or Xilinx FPGA platforms and AI toolchains (Vitis AI, OpenVINO).

  • Understanding of deep learning models (ResNet, YOLO) and image processing techniques.

  • Programming skills in C/C++ and Python.

• Analytical:

  • Ability to analyze performance bottlenecks and optimize hardware resources.

• Soft Skills:

  • Strong problem-solving ability, attention to detail, and willingness to learn.

  • Good communication and teamwork skills.

Other information

The current base annual salary range for this role is currently $18.00 - $57.00. Pay scales are determined by role, level, location and alignment with market data. Individual pay is determined through interviews and an assessment of several factors that that are unique to each candidate, including but not limited to job-related skills, relevant education and experience, certifications, abilities of the candidate and pay relative to other team members. Our recruiters can share more information about our bonus program, benefits and equity during the hiring process.

* This position is located on-site in San Jose, CA. It requires onsite presence to attend in-person work-related events, trainings and meetings and to further ensure teamwork, collaboration and innovation.

* Routinely required to sit; walk; talk; hear; use hands to keyboard, finger, handle, and feel; stoop, kneel, crouch, twist, reach, and stretch. Occasionally required to move around the campus.

* Occasionally lift and/or move up to 20 pounds.

* Specific vision abilities required by this job include close vision, color vision, peripheral vision, depth perception, and ability to adjust focus.

* Must be willing to work in a clean room environment, wearing coveralls, hoods, booties, safety glasses and gloves for entire duration of shift.

* While performing the duties of this job, the employee routinely is required to sit; walk; talk; hear; use hands to keyboard, finger, handle, and feel; stoop, kneel, crouch, twist, reach, and stretch.