Principal Signal Integrity Engineer

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

• Perform simulations for signal integrity and power integrity analysis.

• Perform hands-on high speed signal validation, analysis and correlation including de-embedding, and interconnect characterization.

• Power delivery modeling, simulation, and characterization for combined effects of die, package, board, and voltage regulators.

• Provide implementation guidelines and feedback to hardware and package design teams and occasionally to silicon design teams for electrical signal and power integrity including crosstalk, insertion loss, return loss, jitter, power supply noise, etc.

• PCB stack-up review and layer assignment for high-speed interconnects and PDN.

• Document procedures and methodologies to be adopted by other team members/teams.

What We're Looking For

• Bachelor's degree in electrical engineering, or any other related field with 8+ years of experience; or a Master's degree or Ph.D. in electrical engineering with 5+ years of experience.

• 5+ years of experience with HFSS, ADS, and other tools for simulations of PCBs for high-speed interfaces, including, 112G SerDes, PCIe Gen5/Gen6, DDR5, LPDDR5x, etc.

• 5+ years of experience with DC IR drop and PDN analysis for boards with ADS, Ansys, Cadence tools.

• Has strong fundamentals in 3D/2D EM simulation tools and transmission line theory.

• Must be experienced in PCB/interposer design constraints, routing feasibility and SI/PI design considerations to identify potential future performance issues and mitigate them in the design phase.

• Excellent communication skills, both verbal and written, to effectively collaborate with cross-functional teams including, silicon, packaging, PCB design, customers, and present findings to the stakeholders.

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.