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Intern, Analog Design, Technology Platforms - Summer 2025

Murata Electronics
United States, California, San Diego
8333 Clairemont Mesa Boulevard (Show on map)
Mar 07, 2025


Intern, Analog Design, Technology Platforms - Summer 2025
Location:


San Diego, CA, US



pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor's 30-year legacy of technology advancements and strong IP portfolio but with a new mission-to enhance Murata's world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi's product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi's team explores new ways to make electronics for the connected world smaller, thinner, faster and better.

Intern, Analog Design, Technology Platforms

Job Summary

The Analog Design Intern will assist engineers in designing and developing Technology Platforms' analog circuits which form a critical part of pSemi's RFIC products for cellular and connectivity applications. The analog circuits may include but are not limited to charge pumps, bandgap references, low drop-out regulators, logic translators, RF gate drivers, power-on-reset, DFT circuit blocks, etc. Additionally, the candidate will support development of veriloga models for the various analog circuit blocks as well as help document design information for circuit blocks. The candidate may need to interface with Digital design, Layout, Process technology and Modeling teams as necessitated by the scope of their assigned project.

Roles & Responsibilities

This position has responsibility for:



  • Analog/Mixed-Signal Block Design:Work independently and with our engineers on simulation and layout of circuit blocks.
  • IP Block Characterization:Work with Characterization engineer to analyze data from circuit block level testing and create test reports.
  • Product Support:Build Verilog/Verilog-a models for analog circuit blocks to enable efficient simulations at chip level. Interface with Analog and RFIC design teams as needed to fine tune the models
  • Documentation:Document any design work to educate others on IP block usage.



Minimum Qualifications



  • Knowledge of analog integrated circuit design
  • Software tools: Cadence, Excel
  • Strength in documentation clarity and completeness
  • Able to work effectively within the group and cross-functionally with other teams
  • Strong sense of urgency to meet task requirements on schedule



Preferred Qualifications



  • Familiarity with RF IC and Systems topics
  • Familiarity with SOI process



Education & Experience Requirements



  • B Fulltime enrollment in accredited Bachelor's degree program in Electrical Engineering, Computer Engineering or equivalent (must be completing 3+ year) or MSEE candidate



Work Environment

This job operates in a professional office environment. This role routinely uses standard office equipment.

Physical Demands

The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.

USD 32.20 - 58.32 per hour

Thank you for your interest in our temporary position. Please be advised that the selected candidate will be employed and receive all wages directly from a third party staffing agency selected by pSemi.

pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver's license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including "protected veterans" under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.

Note: The Peregrine Semiconductor name, Peregrine Semiconductor logoand UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP andDuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: http://patents.psemi.com



Additional Position Information:



Nearest Major Market: San Diego


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